SCC: Efficient Error Correction Codes for MLC PCM

Phase Change Memory (PCM) has presented as a potential replacement of DRAM due to its better scalability. However, MLC PCM encounters reliability problems such as resistance drift error and cell wear-out. To improve reliability, implementing strong Error Correction Codes (ECC) is required but this incurs substantial overhead to memory system. Existing ECC schemes have trade-offs between error correction capability and overhead. This paper proposes Single Cell Correction (SCC) codes, an efficient ECC scheme which can correct single cell errors in MLC PCM with small overhead.