Signal integrity analysis of heterogeneous integration using Si bridge technology

As Moore’s Law approaches physical limitations, 2.5D advanced packaging technologies using silicon (Si) interposer, redistribution layers (RDL) interposer, and Si bridge, which enable high-density electrical connection between logic dies such as Neural Processing Unit (NPU) and memory dies such as High Bandwidth Memory (HBM) with IC substrate, are steadily being developed. In this paper, we tried to introduce Heterogeneously Integrated Chips trademark (HIC™) which is our own platform to provide the 2.5D advanced packaging solution using Si bridge. HIC™ can offer the design solution for multi-die heterogeneous integration with Si bridge. For this, optimized conditions of wiring layers in Si bridge through electrical simulation was studied.