Continuous Convolution Accelerator with Data Reuse based on Systolic Architecture

Convolution operation is a crucial technique in the field of artificial intelligence (AI), particularly in image processing-based applications. However, a significant amount of computation time is required to perform an operation on a vast amount of data. The conventional operation processing method of the systolic array architecture tends to accelerate the speed of convolution operations by reusing only the weight data. To minimize data movement time, we propose a systolic array architecture that partially reuses the input feature map. Compared to the conventional systolic array accelerator, the proposed architecture demonstrated a throughput improvement of ×6.