A Design of High Resolution ADC-Assisted Gated-Ring Oscillator TDC with Digital Calibration

This paper introduces an ADC-Assisted Gated-Ring Oscillator (GRO) Time-to-Digital Converter (TDC) structure with constant and high resolution through digital calibration. This circuit consists of a general GRO based on a multi-path delay cell, a resistive-interpolated Flash ADC to improve resolution. Encoder includes averaging function, and digital calibration. Resolution can be improved three times by utilizing the resistive-interpolated Flash ADC, resulting in a resolution of 4 ps. Additionally, the averaging function can increase the actual output resolution by 8 times, then the final resolution of this TDC can be 0.5 ps. A constant resolution can be secured in all corner cases through digital calibration.