Comparative Analysis of Hardware and Software Utilization in the Implementation of Full Adder Using Vivado

It's an issue for certain developing nations to get enough electricity. By researching and developing a powerful Full adder on the Vivado platform across multiple generations of FPGAs, we have made significant progress towards realising the goal of eco-friendly communication. A wide variety of FPGA families were studied to accomplish this. Several other FPGA families, including Genesys, Kintex, and Zed, are implemented using the Seven series boards. The goal of this study was to determine which FPGA family had the most efficient power usage overall. Each of Genesys, Kintex, and Zed consumes a different amount of energy: 1.08 W, 1.515 W, and 1.025 W, respectively. The temperature in Genesys is 53 degrees Celsius, in Kintex it's 71.1, and in Virtex it's 70.2. Power dissipation can be minimised by switching to the Genesys family of 7 series of components from the other two families, as explained in the manual. Among FPGA families, Zed's power efficiency is on par with the rest. When compared to competing boards, Zed Boards offer significant energy savings.