A 700-nA Tunneling Current-Based Amplifier in 22-nm FDSOI

This paper presents a novel approach for achieving bias control in low-power amplifiers by utilizing gate tunneling current. The conventional method to set a capacitive-feedback amplifier’s DC bias operating point is to use a large on-chip resistor, adding significant power and area overheads. In contrast, the proposed technique leverages the inherent characteristics of tunneling current to establish and regulate the DC bias, eliminating the need for large on-chip bias resistors. The amplifier is fabricated in a 22-nm FDSOI technology and occupies an active area of 102 µm
²
. Experimental measurements show a total 700-nA current consumption from a 0.8-V supply. The amplifier also demonstrates 228 µV
RMS
input-referred noise over a 10-kHz bandwidth and a signal-to-spurious-free dynamic range (SFDR) of 40 dB.