Universal 32/64-bit CGRA for Lightweight Cryptography in Securing IoT Data Transmission

National Institute of Standards and Technology (NIST) has standardized ten lightweight cryptography (LWC) algorithms for efficient data protection in IoT, often implemented in hardware to optimize speed and power for resource-constrained devices. However, previous hardware architectures face challenges in providing flexible support for different LWC algorithms with high speed and low power consumption to meet the diverse tasks of gateway and edge devices. Therefore, this paper presents LiCGRA, the first 32/64-bit coarse-grained reconfigurable architecture (CGRA) for LWC, focusing on high flexibility, fast processing, and low power consumption. Our LiCGRA includes three proposed optimizations: a one-dimensional 4×4 processing element array (PEA) to enhance parallel processing capabilities, a multi-bit processing arithmetic logic unit (ALU) to support various LWC operations, and a multi-level data forwarding mechanism to minimize memory access. The successful implementation and verification of the LiCGRA on the ZCU102 FPGA demonstrated its superior speed and energy efficiency compared to existing research on LWC implementation using the iMX233. Experiment on ASIC with a 45nm CMOS technology yields that LiCGRA archives an area of 0.309 mm
²
, a power consumption of 88.506 mW, and a throughput of 1,948 Mbps, offering comparable throughput to dedicated single LWC architectures while providing greater flexibility.