On-Chip-Registration Supported ASR Processor Using Two-Step Transfer-Learning TWN

This brief proposes an automatic speech recognition (ASR) processor which supports on-chip speaker registration. For noise-robust low-power IoT implementation, we introduce three innovations: a) a two-step training ternary weight network inspired ASR system with specified classifiers that can process both speaker verification and keyword spotting; b) an addition tree structure based on a quality-aware inter-compensation method to achieve high energy efficiency; and c) transfer-learning-based backward propagation units for on-chip registration. Under 28-nm CMOS technology, it achieves
$12.06~\mu \text{W}$
power consumption with high recognition accuracy and wide SNR range (5dB~Clean), and an on-chip training speed of 4.2 second/frame/MHz.