An Ultra-High 6318-PPI Pixel Circuit for Micro-OLED Displays With Vth Compensated up to 10-bit Gray Levels

An eight FETs and two capacitors (8T2Cs) pixel circuit with dual data voltages (
$V_{\text {data}}$
’s) is proposed for micro-organic light-emitting diode (OLED) displays, resulting in and validated successfully with an ultra-high pixel-per-inch (PPI) of 6318. This designed pixel circuit can also realize 10-bit threshold voltage (
$V_{\text {th}}$
)-compensated gray levels. It is known that conventional displays are 1024 gray levels by inputting 10-bit
$V_{\text {data}}$
’s to the pixel circuit for generating pixel currents (
$I_{\text {pixel}}$
’s), resulting in the
$V_{\text {data}}$
range of at least 5.12 V with the DAC’s 1-LSB of 5 mV assumed. However, for the CMOS processes of dozens of nanometers, only high-voltage FETs (HVFETs) in large sizes can drive with such large
$V_{\text {data}}$
range, undermining the chance of high PPI. The new pixel circuit proposes herein low-voltage FETs (LVFETs) in place of most HVFETs successfully by synthesizing two
$V_{\text {data}}$
’s to generate the required
$I_{\text {pixel}}$
’s for 10-bit gray levels with the dynamic range of
$V_{\text {data}}$
reduced to 0.64 V, while the
$V_{\text {th}}$
’s can still compensate. This circuit featuring 6318 PPI is successfully fabricated in the chips of the 55-nm CMOS process for validations. The simulation result show that, with
$V_{\text {th}}$
’s compensated, the
$\Delta I_{\mathbf {pixel}}$
’s with respect to the currents at corner TT are improved from the averaged +285% of FF to +11.1% and the averaged −69.1% of SS to −9.1%. Favorable voltage linearities were also seen between gray levels. Both DNLs and INLs in the range of ±1 LSB were measured on a testkey-form circuit, appearing consistency with the simulation results and verifying the expected performance of the designed dual-data-driven pixel circuit.