An Open-Source eFPGA-based SoC Design for Computation Acceleration

FPGAs have gained attention in recent years with their concurrent computing and reconfigurability abilities. Because of the interest, research on open-source FPGAs has increased, similar to open-source processors. However, there are not any open-source system-on-chips (SoC) with embedded FPGA. This work proposes an open-source eFPGA-augmented SoC. The system consists of PicoRV32, an open-source RV32IMC core, an embedded FPGA, and communication peripherals. The in-system communication is maintained with the Wishbone B4 bus protocol. The embedded FPGA is a homogenous island-style FPGA that has 1960 LUTs and 448 I/Os. The CLBs have ten 6-LUTs and local routing muxes to implement Boolean functions efficiently. The switch boxes are Wilton-style with a connectivity parameter of three to increase connectivity between connection boxes. The configuration protocol is chosen as the scan-chain protocol to ease physical design. Finally, the software and embedded FPGA implementations are run on the system and compared. According to the result, the proposed SoC design methodology provides an %81 average acceleration over 3 benchmarks.