Common-Ground-Type Inverter Topology With Low Voltage Stress and Boosting Ability

This brief proposes a seven-level transformer-less common ground-type inverter topology with a three-fold voltage gain. Due to the common ground, the proposed inverter eliminates the photovoltaic ground leakage current due to parasitic capacitance. The proposed topology employs only two capacitors with reduced voltage ratings, which enhances reliability and lowers the overall cost. The capacitors impress less stress on the semiconductor devices. Further, the capacitor voltages are self-balanced, ensuring sensor-less operation. Additionally, the proposed inverter requires the lowest number of conducting devices, resulting in lower conduction losses. The circuit description and operating principle are deliberated in detail. A comparison with other similar inverters is included, and from the results, it will be shown that the proposed inverter has the lowest total standing voltage as compared to others with the same performance and boosting gain. The comparative summary also includes an exclusive cost and volume based assessment to prove the practicality of the proposed topology. Finally, the experimental results of the proposed inverter are presented under steady-state and dynamic conditions in grid-connected and stand-alone modes to validate its feasibility.