On Structure Design Optimization of GaN Based Semiconductor Device for Reduced Trapping

The material and structure have a significant impact on trapping, which is the most relevant degradation mechanism that limit the performance of GaN based semiconductor devices. In this paper, the impact of three different field-plate (FP) structures on buffer trapping in GaN High Electron Mobility Transistor (HEMT) is investigated by means of TCAD simulation. Gate, source and gate-source connected field plates are considered in the investigation. The impact of the FP structure on the trapping effect is analyzed in terms of trapped electron concentration, potential contour, electric field and current collapse. Pulsed I-V simulations are carried out to characterize the trapping induced current collapse and evaluate the effectiveness of the three FP structures on reducing the buffer trapping. It is found that the gate-connected field plate provides optimal performance with respect to the other structures.