A P-Type Enrichment/High Voltage N-Well Junction Si-SPAD With Enhanced Near-Infrared Sensitivity in 180 nm BCD Technology

A near-infrared (NIR) enhanced silicon single-photon avalanche diode (SPAD) implemented in 180 nm Bipolar-CMOS-DMOS (BCD) technology is proposed. A deep P-type enrichment/high voltage N-Well (HVNW) junction is employed to enhance the NIR photon detection probability (PDP). Two lateral junctions are formed on both sides of the HVNW to further assist the NIR photon detection. Meanwhile, the P-type enrichment is surrounded by P-Well and a less-doped epitaxial layer to prevent premature breakdown and reduce dark count noise. It is experimentally demonstrated that a moderate breakdown voltage of ~ 20 V is obtained, which is suitable for the bias requirement of SPAD imaging arrays. At an excess bias of 5 V, the SPAD exhibits a peak PDP of 50% at 520 nm and a NIR PDP of 5.7% at 905 nm. At T = 27°C, it achieves a median dark count rate (DCR) of 0.41 cps/
$\mu \text{m}^{{2}}$
and afterpulsing probability < 0.1% with a dead time of 700 ns. The full width at half maximum jitter at 532 nm wavelength is 80 ps. This work provides a feasible solution for the design of near-infrared time-of-flight (ToF) detectors with high performance.