A Bandwidth-Boosted Hybrid LDO With Spike-To-Time Converter for Near-Threshold Regulation

A fully integrated output-capacitorless hybrid low-dropout regulator (HLDO) with enhanced transient response and tight regulation, able to operate at ultralow supply, is proposed in this article. The proposed HLDO contains a dual-control-loop structure to separate the proportional and derivative controls. A spike-to-time converter is used in the derivative control loop to convert the output transient spikes into digital signals and then activates the digital control loop to adjust the output current rapidly to speed up the recovery of output. In the proportional control loop, an analog controller based on the ring-amplifier structure with the proposed compensation scheme utilizes a hybrid algorithm to achieve a rippleless output. The proposed HLDO is fabricated in a 65-nm CMOS process with a regular threshold voltage of about 0.45 V. The chip area is 0.0302 mm
²
. The total on-chip capacitance is 4.4 pF. The minimum supply voltage is as low as 0.5 V with a minimum dropout voltage of 20 mV. At 1-V supply, the measured undershoot at the output is 142 mV and its settling time is 17 ns when the output current increases from 100
μ
A to 300 mA in 5 ns. The figure-of-merit is 2.05 fs.