A New Zero-Overhead Test Method for Low-Power AI Accelerators

Artificial intelligence (AI) accelerators that support AI services consist of multiple identical cores for parallel computation to accelerate artificial neural networks. Recently, systolic array-based architectures for low-power AI accelerators have been studied to support battery-operated edge devices and reduce power consumption. In this brief, a zero-overhead method is proposed for efficient testing of systolic array-based low-power AI accelerators. By using the structural characteristics of the systolic array and a reset operation, the proposed method can test multiple identical cores based on the systolic array without any additional hardware. The proposed method is divided into MAC and comparator test methods to use the structural characteristics of systolic arrays for low-power AI accelerators. The experimental results demonstrate that the proposed method achieves 100% test coverage without any additional hardware and has reasonable test times compared to previous methods.