A Dual Loop Low-Dropout Regulator with Fast Transient Response

In this work, a dual loop low-dropout regulator (LDO) with fast transient response is proposed to provide a clean supply for mixed-signal system. The proposed LDO has a high-speed inner loop for enhancing transient response capability, and the global loop has high gain to improve the power supple rejection (PSR). The circuit is designed and simulated in 28nm CMOS process, including 50pF on chip load capacitor. For a 1. 8V input voltage and 0. 9V output voltage, the simulated undershoot and overshoot voltage is only 60mV and 48. 5mV, respectively, for load transient of 0μA to 10mA within edge times of 120ps. The PSR is 43dB at lMHz and is better than 19dB through up to 10GHz frequency range.