A 28-Gb/s PAM-4 Fully-Integrated Optical Receiver with High-Speed Silicon Photodetector in 28-nm CMOS

This paper presents a 28-Gb/s PAM4 fully-integrated optical receiver for short-range optical communication in 28-nm CMOS. This receiver incorporates an on-chip silicon photodetector, a peaking-scalable trans-impedance amplifier (TIA) with the single-to-differential current buffer, a two-stage variable gain amplifier, a continuous-time linear equalizer, and an output buffer. A silicon P-Well/N-Well on-chip photodetector in the standard CMOS process with less junction capacitance is employed to realize a bandwidth of 4.53 GHz. The proposed TIA realizes a 0.9-dB high-frequency pseudo-difference mismatch with low power. Moreover, the peaking-scalable operation of TIA is implemented by an adjustable high-pass filter. This receiver achieves a
$\mathbf{71}-\mathbf{dB}\mathbf{\Omega}$
trans-impedance gain and a 28-Gb/s PAM-4 eye diagram with the energy efficiency of 0.41-pJ/bit under 1.0-V supply.