A 1.2-mA Fast-Charge Input Buffer with CLS for 4-MS/s SC Oversampling ADC Achieving +1-2.5-ppm/FSR INL

This paper presents a 1.2-mA fast-charge input buffer with correlated level shifting (CLS) for a 4-MS/s SC oversampling ADC fabricated in 180-nm CMOS. The buffer includes a separate closed-loop fast charger to avoid the slewing process before the fine settling and CLS to confine the OTA's output into a small voltage range for linearity improvement with acceptable power consumption. The ADC with the buffer achieves 103.4-dB SNDR, 113.2-dB SFDR, and +/-2.5-ppm/FSR INL under 4-MS/s
$\boldsymbol{f}_{\mathbf{s}}$
.