A 40nm 5-16Tops/W@INT8 eFlash In-Memory Computing SoC Chip with Noise Suppression and Compensation Techniques to Improve the Accuracy

This paper presents an eFlash-based in-memory computing (IMC) SoC exploiting noise suppression and compensation techniques, including analog noise modeling, noise-aware training and digital noise compensation. The 40nm IMC SoC achieves energy efficiency of 5-16Tops/W at 8-bit precision, improves Perceptual Evaluation of Speech Quality (PESQ) value by 0.7 (29.2%), and accuracy by 13.5% and 13.4% for voice wake-up and recognition applications, in comparison with the one without the above noise suppression and compensation techniques.