PhGraph: A High-Performance ReRAM-Based Accelerator for Hypergraph Applications

Hypergraph processing has emerged as an effective approach to analyze complex multilateral relationships in real-world scenarios. Existing hypergraph processing solutions based on conventional architectures are severely bottlenecked by off-chip memory accesses. In this article, we propose the first processing-in-memory (PIM)-featured ReRAM-based hypergraph accelerator, dubbed PhGraph, which facilitates performance- and energy-efficient hypergraph processing. On the hardware level, PhGraph integrates analog memristor-based PIM (with high-matrix-grained parallelism) and digital memristor-based PIM (for high-bipartite-edge-grained efficiency) into one standalone solution. On the software level, an overlap-aware hypergraph partitioning mechanism is proposed to polarize hypergraph workloads into matrix-formatted dense and bipartite-edge-formatted sparse partitions for performance acceleration using analog memristor-based PIM and digital ones, respectively. In addition, PhGraph is equipped with load-balanced partition scheduling and algorithm mapping co-designs to boost hardware utilization and efficiency. Experimental results show that PhGraph outperforms the state-of-the-art CPU-, FPGA-, and ASIC-based solutions by up to 4,
$309.81\times $
,
$547.13\times $
, and
$166.76\times $
in terms of performance, and 36,
$416.11\times $
,
$924.12\times $
, and
$41.44\times $
in terms of energy-savings, respectively.