Performance Enhancement of Switched-Capacitor-Based Bridgeless Buck PFC Rectifier

This letter presents an enhanced hybrid switched-capacitor-based buck power factor correction (HSC-BPFC) rectifier suited for high-efficiency applications. The suggested pulsewidth modulation strategy results in a five-level voltage waveform at its input ac terminals. Therefore, a lower volt-second on the input inductor results in a smaller inductor size and lesser current ripple. In addition, compared to equivalent contemporary design, the reduced switching transitions of all devices within a line-frequency cycle result in reduced power losses. Also, the semiconductor devices and energy storage components incur lesser current stress and have decreased conduction losses. Furthermore, the comparative analysis reveals the enhanced performance of the proposed rectifier. The practicality of the proposed HSC-BPFC rectifier is verified through the experimental results.