A 3.5 GHZ Low-Noise Amplifier with TR Switch Package

This letter presents a 3.5 GHz low noise amplifier (LNA) with TR switch design that uses two common source and gate. The integrated two stage LNA with TR switch is fabricated by the tsmc 0.18 um CMOS process and package bonding wire with its noise figure of 5.87 dB, the 1 dB compression point (P
ldB
) of -27.69 dBm, and input 3
^rd
order intercept point (IIP3) of -18.41 dBm, respectively. Overall chipset consumes 9.34mW with a supply voltage of 1.7 V.