An 11bit 360MS/s Pipelined SAR ADC with Dynamic Negative-C Assisted Residue Amplifier

Pipelined SAR ADCs are widely used for moderate-to-high resolution applications. In this architecture, a residue amplifier plays a key role in speed and linearity, so it is inevitable that the amplifier consumes a large amount of power to achieve the target performance. Several amplifier topologies such as Gm-based amplifier, ring amplifier, and floating inverter amplifier (FIA) [1]–[3] have been developed to improve energy efficiency and represent a successful alternative to conventional OTAs. However, achieving high bandwidth while maintaining good energy efficiency of ADCs is still very challenging.