Analysis and Comparison of Logic Architectures for Digital Circuits in a-IGZO Thin-Film Transistor Technologies

In this work, five different logic architectures [diode-load (DL), dual-input diode-load (DINP-DL), pseudo-CMOS (P-CMOS), crossover, and differential] for digital circuits in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) technologies are analyzed and compared. Dual-gate self-aligned (DGSA) lab technology is used to process n-type devices with a-IGZO channel on 6-in glass wafers and flexible substrates. Inverters, ring oscillators, and RFID-compatible 12-bit Manchester-encoded code generator circuits, using different logic architectures, are designed, processed, and characterized. Analyses of unipolar gates are performed to improve the digital design flow for realizing complex digital circuits. A detailed overview compares these logic architectures on different metrics such as robustness, power consumption, performance, and area with the aim of choosing the most optimal logic to comply with the specifications of targeted applications.