A strategy for enabling predictive TCAD in development of sub-100nm CMOS technologies

CMOS technology development is an expensive undertaking. Predictive TCAD can be a key tool in reducing the time and cost of CMOS development by acting as a virtual wafer fah where experimental lots are first simulated and the results analyzed before the first process step is ever run. In this way errors may be uncovered, poor splits eliminated and inadequate experimental designs improved. Each lot yields more information through better design and less waste. However, in order to achieve these improvements TCAD simulators must be quickly calibrated with new models that simulate the new physics for sub-100nm technology nodes. Because of the rapid pace of CMOS development, the available commercial simulators do not usually contain all the models needed in order to be predictive. This paper describes our efforts in upgrading the commercially available simulators TSUPREM4 and Dessis for the purpose of aiding in the development of sub-100nm high performance and low stand-by power CMOS technologies.