Theoretical Analysis and Experimental Characterization of 1.2-kV 4H-SiC Planar Split-Gate MOSFET With Source Field Plate

The 1.2-kV-rated 4H-SiC planar split-gate (SG) MOSFET embedding source field plate incorporated between separated gates (termed SFP-SG-MOSFET) is proposed and demonstrated. The utilization of the embedding source field plate in conventional SG-MOSFET (Conv-SG-MOSFETs) serves to alleviate the adverse effects of electric field crowding. It also maintains the minimum reverse transfer capacitance (
${C}_{\text {rss}}{)}$
. As a result, the high-frequency figure-of-merit (HF-FOM) and switching efficiency of the proposed SFP-SG MOSFET are improved compared to those of a conventional planar-gate MOSFET (Conv-PG-MOSFET) while maintaining the same blocking voltage rating. The experimental results demonstrate that
${C}_{\text {rss}}$
of the fabricated devices is reduced by 80% and 53% at
${V}_{\text {ds}}$
= 0 V and
${V}_{\text {ds}}$
= 800 V, respectively. Thus, the SFP-SG-MOSFET exhibits HF-FOMs
$ < {R}_{\text {ON}} \times {C}_{\text {rss}}>$
4.9 times lower at
${V}_{\text {ds}}$
= 0 V and 2.0 times lower at
${V}_{\text {ds}}$
= 800 V. Furthermore, the switching loss of the SFP-SG-MOSFET is reduced by 25%. This makes it possible for the proposed devices to handle a higher power density.