IEEE Standard for a Control and Status Registers (CSR) Architecture for Microcomputer Buses

Administratively withdrawn January 2007 A common bus architecture (which includes functional components--modules, nodes,and units--and their address space, transaction set, CSRs, and configuration information) suitablefor both parallel and serial buses is provided in this standard. Bus bridges are enabled by the archi-tecture, but their details are beyond its scope. Configuration information is self- administered byvendors and organizations based upon IEEE Registration Authority company_id.