Development of a Device on FPGA to Implement the Base Operation of Neural-like Data Encryption Using Polynomials

The implementation of neuro-like data encryption using polynomials is considered. The structure of the device was developed with the usage of the base operation of neuro-like data encryption. The base operation of data encryption is implemented on the FPGA using the hardware programming language VHDL in the Quartus development environment. Simulation of the designed module’s operation and estimation of encryption time and hardware resources required for its implementation were carried out.