Safe Integration of Learning in SystemC using Timed Contracts and Model Checking

Intelligent components such as reinforcement learning are increasingly used in safety-critical embedded systems, e.g., in cars, trains or traffic control systems. While it is crucial to verify the correctness of such systems under all circumstances, their formal verification is difficult due to multiple challenges: the real-time and concurrent behavior, deeply intertwined hardware and software components, the lack of formal semantics in industrially used design languages such as SystemC, and the trial-and-error behavior of learning components. In this paper, we present an approach to safely integrate learning into systems that are designed in SystemC using timed contracts and model checking. Our main contribution is twofold: 1) We show how the safe behavior of a learning component within a concurrent real-time system can be defined by a timed contract. 2) We provide an embedding of such contracts into an existing transformation from SystemC to UPPAAL timed automata. This enables us to use the UPPAAL model checker to formally verify that the SystemC design is safe under the assumption that the learning component adheres to its timed contract. To ensure safe behavior at runtime, we integrate the contract as a runtime monitor in the SystemC design. We demonstrate the applicability of our approach with a case study of an intelligent traffic light controller that uses reinforcement learning.CCS CONCEPTS• Computer systems organization → Embedded and cyberphysical systems; • Software and its engineering → Formal software verification.