SPICE Modeling of RADFETs with Different Gate Oxide Thicknesses

This paper will present guidelines for creating a SPICE model of RADFETs with different gate oxide thicknesses. Model parameters, such as threshold voltage and carrier mobility, were extracted from the transfer characteristics in the saturation region. The model was satisfactorily used to simulate RADFETs with oxide thicknesses ranging from 40 nm to 300 nm.