Booth Multiplier with Adjustable Widths Based on Probability Estimation Approach

This paper proposes a circuit of the Booth multiplier with adjustable width by exploiting the probabilistic prediction technique. The hardware cost is thus reduced by relaxing the computing accuracy requirement. The developed error compensation scheme is analyzed based on the probability analysis and partial product partitioning. As compared to the conventional post-truncated Booth multiplier, the presented architecture is improved by 29% in terms of circuit area. The mean absolute error of the presented circuit is also reduced over the previous works.