Design of negative charge pump circuit with polysilicon diodes in a 0.25 /spl mu/m CMOS process

A charge pump circuit realized with the substrate-isolated polysilicon diode in the 0.25 /spl mu/m CMOS process is proposed. With the polysilicon diode, the stable negative voltage generation can be realized in general sub-quarter-micron CMOS process without extra process modification or additional mask layer. The device characteristic of polysilicon diode and the voltage waveforms of the negative charge pump circuit have been successfully verified in a 0.25 /spl mu/m CMOS process with grounded p-type substrate.