Abstract:
This work presents a power stage architecture that combines high–linearity with high–efficiency. The power stage is configured as a push–pull Class–A topology with two bu...Show MoreMetadata
Abstract:
This work presents a power stage architecture that combines high–linearity with high–efficiency. The power stage is configured as a push–pull Class–A topology with two buck–converters providing its supply rails. The buck–converters continuously track the stage’s output with a small constant margin, creating a minimum, constant voltage drop on the output devices; thus, the stage’s efficiency is increased and its linearity is improved. Theoretical analysis of the topology and its feedback control are presented, while a design example is implemented and simulated in Cadence Spectre as proof–of–concept.
Published in: IEEE Open Journal of Circuits and Systems ( Volume: 4)