Feasibility Study of Incremental Neural Network Based Test Escape Detection by Introducing Transfer Learning Technique

Machine-learning-based test escape detection is gaining attention as a novel approach for detecting faulty large-scale integrated circuits (LSIs) that traditional methods fail to detect. In such scenarios, a model is developed by learning a significant amount of data from the LSI test results and used to test the manufactured LSIs. However, because manufactured LSIs are subject to lot management, the data used for learning are transmitted sequentially, necessitating restarting the learning process from the beginning at each manufacturing stage when new data arrive, leading to prolonged learning times. In this study, we propose a novel test escape detection method utilizing a transfer learning technique that reduces learning times while preserving test accuracy by learning the data of newly manufactured LSIs while maintaining the previously learned model. Evaluations utilizing the LSI production test data indicated that the proposed method can decrease the learning time by more than 40.40% without compromising the test accuracy.