Converting an embedded low-power SRAM from bulk to PD-SOI

The migration of an embedded 1 Mbit SRAM for low power applications from a 0.13/spl mu/m bulk to a partially depleted silicon-on-insulator (PDSOI) technology is described in this paper. Floating body effects such as threshold voltage variation and parasitic bipolar turn on and their impact on sense amplifiers, pass-gates based multiplexers and dynamic decoders are addressed. Solutions like the use of body contacts in specific parts are discussed. A SRAM chip with various testable configurations has been taped out.