An FPGA based Real-Time Flat Field Correction for Infrared Focal Plane Arrays

Correction of fixed pattern noise (FPN) plays a vital role in fully exploiting the potential of the infrared focal plane arrays (IRFPA). The paper presents FPGA based hardware architecture for flat field correction (FFC) for thermal camera with an external shutter. The proposed hardware architecture is built using a high-level synthesis (HLS) approach to generate Verilog or VHDL codes from C++ code. HLS Video Direct Memory Access (VDMA) generated have 256-bit width interconnected with First In First Out (FIFO) that reduces Double Data Rate (DDR) traffic. The design is tested on Efinix quantum technology that delivers substantial power, performance, area, and advantages over traditional FPGA products. The design achieves a maximum frequency of 400 MHz and one pixel per clock. Long Wavelength Infrared (LWIR) thermal camera with a resolution of $640\times 512$ and 12um pitch is used as the source for the raw video. The design achieves 60 frames per second (fps).