Design an Efficient FPGA-Based Accelerator for Leveled BFV Homomorphic Encryption

In this brief, we present computational fusions with Residue Number System (RNS) basis transforms to enhance computational efficiency. We also investigate the impact of the word length of RNS primes for the leveled BFV scheme. Moreover, the method of dedicated acceleration for the critical subroutine is proposed. Based on these optimizations, an efficient accelerator for the leveled BFV scheme is accomplished on Virtex-7 FPGA. Compared to latest works, our design achieves 1.6 times speedup and
$1.4\times $
–
$2.6\times $
area-time-product improvements.