A 1–18-GHz High-Gain and Low-Voltage Down-Conversion Mixer in 0.18-μm CMOS Technology

This study presents a wideband down-conversion mixer chip covering the frequency range of 1–18-GHz by TSMC 0.18-
$\mu \text{m}$
CMOS technology. The design of multiband mixers has attracted significant research interest. The main advantage is that it can share circuits, save chip area, and reduce power consumption and cost. The architecture implemented in this study is based on that of a double-balanced switched transconductance (SwGm) mixer. To lower the supply voltage and DC consumption, an LO CMOS series-parallel switching architecture was used in the proposed design. Transformer coupling technology was used at the node between the transconductance and local oscillator switch stages, which can effectively increase the switching current above a frequency of 10-GHz and improve the conversion gain when the power supply voltage is less than 1-V. The measured results for the proposed mixer show a power conversion gain of 10.1–15.9-dB, input third-order intercept point (IIP3) of
$- 4\sim \!\!-9.2$
-dBm, double side-band (DSB) noise figure of 10.3–14.5-dB, and RF bandwidth range of 1–18-GHz. The total DC power consumption of this mixer including the output buffer was 6.8-mW, and its core power consumption was 2.3-mW; the output buffer power consumption was 4.5-mW, and the total die size was
$0.917\times1.1$
-mm2. The mixer exhibited excellent performance characteristics, such as low power consumption, high bandwidth, and high gain.