Digital Reconstruction in Continuous-Time Pipelined Analog-to-Digital Converters

The continuous-time pipelined (CTP) analog-to-digital converter is a power-efficient realization of an anti-alias filter and ADC cascade. Digital reconstruction is a key aspect that determines the performance of the CTP. Ideally, these filters have an infinite impulse response (IIR), but in practice are realized using their FIR approximations. This work investigates the influence of finite length and precision of the reconstruction FIR filters on the performance of the CTP. The theory is supported by measurement results from two three-stage CTPs designed in a 65 nm CMOS process. One of the converters achieves 74dB, whereas the other achieves a 70dB SNDR in a 100MHz bandwidth while sampling at 800MHz.