Enhancing Stability in Single-Phase PLLs: Incorporation of RoCoF Signal in Virtual Orthogonal Signal Construction

Single-phase (
$1\phi$
) phase-locked loops (PLLs) suffer from an oscillatory, time-periodic nature that contributes to the degradation of their stability. This is primarily due to the lack of two independent input signals, which necessitates generating a virtual orthogonal signal for transferring information to the
dq
frame. To mitigate this stability issue, this work proposes incorporating a factor of the rate of change of frequency in the construction of the virtual orthogonal input signal in
$1\phi$
PLLs. The effectiveness of this concept is verified through two case studies on the inverse Park PLL and synthesis circuit PLL.