A Balanced method of Clamp Distribution and Placement in an IO ring

IOs can be exposed to ESD event during assembly and handling. To prevent them from such damage, it is important to build a robust ESD protection network around the susceptible circuits. Effective placement of the supply clamps with respect to IO are critical to build a robust ESD network. In our paper we have analyzed various advantages and disadvantages of the Global ESD network and Distributed clamp ESD network. We have also observed various possibilities of placing supply clamps across the IO ring for the protection of the victim devices. In this context we have proposed a new ESD network which is a good balance between global ESD network strategy and distributed clamp strategy. It has displayed various advantages in terms of enhanced ESD performance, layout area efficiency, tolerance to the impact of rail resistance and IO ring design flexibility in comparison to the existing ESD protection networks. The proposed method is backed by spice simulations which has been successfully followed in various silicon proven projects.