A Vertical Probe Card Design for High-Speed Wafer Test

High-speed wafer testing is a difficult problem in the automated mass production testing of integrated circuits. A vertical probe card for high-speed wafer test is designed in this paper. Based on loopback testing technology, the transmission path of high-speed signals is reduced significantly. A complete model for the probe card simulation is built to optimize the design. The simulation results show that the return loss and insertion loss of the full link in the 10 GHz band meet the design requirements successfully. Thus, it provides an effective method for high-speed wafer testing.