Design and Implementation of IR Sensor Based FPGA Robot Using Partial Reconfiguration

A hardware core processor is combined with a programmable structure on a single device in a reconfigurable architecture. The hardware estimators are constructed in a reconfigurable structure to enable advanced estimating. At runtime, partial reconfiguration (PR) allows for on-the-fly changes in functionality while the rest of the logic architecture continues to function normally. PR lowers the number of logical devices, lowers power consumption, and increases system upgradeability. PR hardware design should be divided into two techniques in this article. Static logic and reconfigurable logic are two types of logic. Static logic behaves like a line follower robot, whereas reconfigurable logic behaves like a wall follower robot. After then, PR flow controls the robot's movement (to follow a line or a wall). When snapping in this flow, the robot moves from line to wall automatically when snapping mode is enabled. Because of this, hardwareimplementation time can be saved by 90%.