Investigation of Threshold Voltage Mismatch on Junction Temperature Estimation for Multichip SiC MOSFET Power Modules

Accurate junction temperature estimation is essential in power module applications to ensure optimal performance, reliability, and lifespan. This paper investigates the impact of threshold voltage
$(V_{th})$
mismatch on in-situ junction temperature estimation for SiC MOSFET multichip power module based on the turn-ON delay time
$(t_{d,on})$
. The
$t_{d, \text { on }}$
of power modules and its temperature dependence are related to the
$V_{th}$
of each chip within the power module. Simulations on the
$V_{th}$
mismatch of paralleled MOSFETs demonstrate that selecting a larger reference triggering voltage of
$V_{s_{-}ref}$
enables the extraction of the mean junction temperature based on the
$t_{d,on}$
of the power module. Moreover, the
$V_{th}$
mismatch has almost no effect on the accuracy of the mean junction temperature estimation. Finally, calibration experiments are performed on a commercial half-bridge SiC MOSFET power module with
$t_{d,on}$
extraction circuit. Experimental results show that the
$t_{d,on}$
of SiC MOSFET power module has a linear temperature coefficient of
$150\text{ps}/^{\circ}\mathrm{C}$
at the turn-ON resistance of
$15\Omega$
and is independent of load current.