A 0.82pJ/b 50Gb/s PAM4 VCSEL Driver with 3-Tap Asymmetric FFE in 12nm CMOS FinFET Process

This work presents a 0. 82pJ/b50Gb/s PAM4 driver designed for vertical cavity surface emitting laser (VCSEL)-based optical transmitter (TX). The proposed voltagemode (VM) driver uses a new pulsed-cascode structure to improve the optical modulation amplitude (OMA) with low power consumption. The driver also includes an asymmetric 3-tap feedforward equalizer (FFE) for MSB and LSB to effectively compensate for the bandwidth (BW) and nonlinearity response of the VCSEL for PAM4 operation. Finally, the driver is implemented using multiple segments to optimize the driver output impedance and linearity. The proposed design is implemented in a 12nm CMOS FinFET process and measured using a commercial 850nm anode-driven VCSEL.