The Research on FPGA-Based Real-Time Simulation for the Cascaded H-Bridge Multilevel Inverter

The cascaded H-bridge multilevel inverter with complex structure and high switching frequency brings great challenges to real-time simulation and hardware-in-the-loop (HIL) experiment. For the cascaded H-bridge multilevel inverter, when the number of sub-modules increases, it will affect the real-time simulation accuracy, this paper chooses the switching-function model, separates the nonlinear switching devices from the circuit network, and investigates its dead-time state to realize the simulation of the H-bridge in the dead-time state. The field-programmable-gate-array(FPGA) based cascaded H bridge multilevel inverter model system structure implementation method is proposed, and the System Generator-based modeling design method is used to realize the construction of the real-time simulation model of the cascaded H-bridge inverter. Finally, the real-time simulation platform of cascaded H-bridge multilevel inverter is built, and the experimental results verify the effectiveness of the real-time simulation proposed in the paper.