Implementation of Logic Gates and Combinational Circuits Using Neural Network On FPGA For Neuromorphic Hardware

Neuromorphic computing offers promising avenues for designing highly energy-efficient computing systems. This makes them well-suited for applications that require high-performance computing while minimizing power consumption, such as in edge devices, IoT devices, and autonomous systems. In this work, we proposed a technique for neuron FPGA implementation using Verilog HDL. We have used single layer and multi-layer perceptrons to implement the logic gates and combinational blocks by using the unit-step Function. The hardware implementation of the proposed design was created and tested on a Nexys 4 DDR FPGA board, realized by using Verilog HDL on Xilinx VIVADO and simulated for different inputs value. The proposed neural-based logic gates and combinational blocks emulate similar behavior as conventional blocks. The proposed design could play an important role in future neuromorphic VLSI system design and provides flexibility and adaptability, allowing for easier modifications and adjustments as needed.