Investigation of Positive Bias Temperature Instability of 4H-SiC MOS Capacitors and Deep Interface States Extraction at 300°C

Considerable effort has been devoted to studying the bias temperature instability (BTI) of SiC metal-oxidesemiconductor (MOS) devices to identify the effect of slower states from either charge trapping at $\mathrm{SiC} / \mathrm{SiO}_{2}$ interface or within gate insulator. However, since trap time constant related to both spatial or energy distribution, it’s difficult to distinguish effects of interface states $\left(\mathrm{N}_{\mathrm{it}}\right)$ and near-interface oxide traps (NITs). In this study, we evaluate the positive bias temperature instability (PBTI) of the gate oxide on $4 \mathrm{H}-\mathrm{SiC}$ up to $300^{\circ} \mathrm{C}$ and extract deep $\mathrm{N}_{\text {it }}$ down to $\mathrm{E}_{\mathrm{C}}-1.4 \mathrm{eV}$ to identify the mechanism of PBTI of SiC MOS capacitors.