MOS Capacitor Modeling and Optimization for Fully Integrated DC-DC Converters

In this paper, we propose a model for the rapid characterization of MOS-type capacitors in the accumulation region. Closed-form analytical expressions have been used to estimate the equivalent circuit elements, which are calculated as a function of the design parameters of the layout and of the technological process. To verify the modeling carried out, a set of MOS capacitors with different geometries were simulated in ADS® and the main characteristics of the capacitor were compared. Based on the model, an analysis/optimization was implemented in MATLAB® in order to determine the capacitor/cell layout parameters that optimize its structure, based on a figure of merit. Compared to another work in the literature, the proposed method showed a chip-area reduction of 20.82% and an ESR of 16.38% smaller for the same capacitance value. Capacitor optimization not only contributes to reducing costs but also to improving the performance of the circuit it will make part of.