Read Disturb and Reliability: The Complete Story for 3D CT NAND Flash

While providing large capacity through stacking more layers, high-density 3D NAND flash memories suffer from a higher raw bit error rate (RBER). The reliability behaviors of 3D flash become more complex than planar flash, especially for read disturbance. This work studies the reliability behaviors over read operations on high-density 3D charge trap (CT) NAND flash. Through comprehensive experiments on the latest real 3D flash chips, we present the complete story of read disturb and reliability. By performing repeated read operations on a block, the weak charging from pass-through voltages could compensate for some charge leakage from retention loss. This process could reduce the retention errors of data. However, after a certain amount of read operations, the RBER will increase due to the continuous charging on flash cells. We also present the RBER impacts from read operations under different settings of major error sources, including program/erase (P/E) cycling, retention time, and read location. Based on these observations, we present discussions on read-intensive data allocations, as current flash blocks with more layers would experience much more read operations.